Home Back 
Hardware Level VGA and SVGA Video Programming Information Page
CRT Controller Registers 

        The CRT Controller (CRTC) Registers are accessed via a pair of registers, the CRTC Address Register and the CRTC Data Register. See the Accessing the VGA Registers section for more details. The Address Register is located at port 3x4h and the Data Register is located at port 3x5h.  The value of the x in 3x4h and 3x5h is dependent on the state of the Input/Output Address Select field, which allows these registers to be mapped at 3B4h-3B5h or 3D4h-3D5h.   Note that when the CRTC Registers Protect Enable field is set to 1, writing to register indexes 00h-07h is prevented, with the exception of the Line Compare field of the Overflow Register.

 
Horizontal Total Register (Index 00h)
7 6 5 4 3 2 1 0
Horizontal Total
   
End Horizontal Display Register (Index 01h)
7 6 5 4 3 2 1 0
End Horizontal Display
   
Start Horizontal Blanking Register (Index 02h)
7 6 5 4 3 2 1 0
Start Horizontal Blanking
   
End Horizontal Blanking Register (Index 03h)
7 6 5 4 3 2 1 0
EVRA Display Enable Skew End Horizontal Blanking
   
Start Horizontal Retrace Register (Index 04h)
7 6 5 4 3 2 1 0
Start Horizontal Retrace
   
End Horizontal Retrace Register (Index 05h)
7 6 5 4 3 2 1 0
EHB5 Horiz. Retrace Skew End Horizontal Retrace
   
Vertical Total Register (Index 06h)
7 6 5 4 3 2 1 0
Vertical Total
   
Overflow Register (Index 07h)
7 6 5 4 3 2 1 0
VRS9 VDE9 VT9 LC8 SVB8 VRS8 VDE8 VT8
   
Preset Row Scan Register (Index 08h)
7 6 5 4 3 2 1 0
Byte Panning Preset Row Scan
   
Maximum Scan Line Register (Index 09h)
7 6 5 4 3 2 1 0
SD LC9 SVB9 Maximum Scan Line
   
Cursor Start Register (Index 0Ah)
7 6 5 4 3 2 1 0
CD Cursor Scan Line Start
   
 Cursor End Register (Index 0Bh)
7 6 5 4 3 2 1 0
Cursor Skew Cursor Scan Line End
   
Start Address High Register (Index 0Ch)
7 6 5 4 3 2 1 0
Start Address High
   
Start Address Low Register (Index 0Dh)
7 6 5 4 3 2 1 0
Start Address Low
   
Cursor Location High Register (Index 0Eh)
7 6 5 4 3 2 1 0
Cursor Location High
   
Cursor Location Low Register (Index 0Fh)
7 6 5 4 3 2 1 0
Cursor Location Low
   
Vertical Retrace Start Register (Index 10h)
7 6 5 4 3 2 1 0
Vertical Retrace Start
   
Vertical Retrace End Register (Index 11h)
7 6 5 4 3 2 1 0
Protect Bandwidth Vertical Retrace End
   
Vertical Display End Register (Index 12h)
7 6 5 4 3 2 1 0
Vertical Display End
   
Offset Register (Index 13h)
7 6 5 4 3 2 1 0
Offset
   
 
Underline Location Register (Index 14h)
7 6 5 4 3 2 1 0
DW DIV4 Underline Location
   
Start Vertical Blanking Register (Index 15h)
7 6 5 4 3 2 1 0
Start Vertical Blanking
   
End Vertical Blanking Register (Index 16h)
7 6 5 4 3 2 1 0
End Vertical Blanking
   
CRTC Mode Control Register (Index 17h)
7 6 5 4 3 2 1 0
SE Word/Byte AW DIV2 SLDIV MAP14 MAP13
   
Line Compare Register (Index 18h)
7 6 5 4 3 2 1 0
Line Compare Register
  Notice: All trademarks used or referred to on this page are the property of their respective owners.
All pages are Copyright © 1997, 1998, J. D. Neal, except where noted. Permission for utilization and distribution
is subject to the terms of the FreeVGA Project Copyright License.